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 XC6SLX16-2FTG256C The series provides leading system integration capabilities, manufactured with 45nm technology, to meet the needs of mass applications at the lowest total cost. The Xilinx Spartan® -6 FPGA series consists of two domain optimization subseries, LX (Logical Optimization), and LXT (High-speed Serial connection). Spartan®-6   LX FPGA XC6SLX16-2FTG256C Suitable for low-cost, high-cost-effective applications.

The series supports up to 147K of logical unit density, 4.8Mb of memory, integrated memory controllers, DSP48A1 chips, and high-performance industry-standard integrated I P. Spartan® -6 LXT FPGA for serial connections, providing industry high reliability, low risk, low-cost solutions. Spartan®-6 LX FPGA XC6SLX16-2FTG256C Ability to provide up to eight low-power 3.2 Gb/s serial transceivers to improve system performance.

•Low power consumption of 1.0V core voltage (LX FPGA, -1L only)

• High performance 1.2V core voltage (LX and LXTFPGA-2, -3 and-3N speed class)

•Package the LBGA-256

• Operating temperature: 0 C ~ 85 C (TJ)

•Optional output drive, up to 24 mA per pin

• 3.3V to 1.2V I / O standards and protocols

•Low-cost HSTL and SSTL memory interfaces

•Adjustable I / O pendulum rate to improve signal integrity

• High-speed GTP serial transceiver in the LXT FPGA

•High-speed interface, including Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI

    – Integrated endpoint module for the PCI Express Design (LXT)

    – Low-cost PCI ® technical support with 33 MHz, 32-bit, and 64-bit specifications.

   –  Efficient DSP48A1 slices

   – DDR, DDR2, DDR3, and LPDDR for support

  – Data rate up to 800 Mb / s (12.8 Gb / s peak bandwidth)

  –  Multiport bus structure with independent FIFO can reduce design timing problems

   – Optional shift register or distributed RAM support

  –  The highly efficient 6-input LUT improves the performance and minimizes the power

   – A LUT with dual-triggers for pipeline-centric applications

    -Block RAM with a broad granularity

   – Fast block RAM with byte-write enabled

   – 18 Kb block with the option to be programmed into two separate 9 Kb Block RAM

    -The Digital Clock Manager (DCM) eliminates the clock bias and duty cycle distortion

    -Sixteen low-bias global clock networks

   – The 2-pin automatic detection configuration

   –  Features-rich Xilinx platform flash memory with JTAG

    -MultiBoot supports multiple remote upgrade bitstreams, using watchdog protection

    -Faster embedded processing, enhanced low cost

    The Xilinx Spartan® -6 FPGA series is ideal for automotive infotainment, and consumer and industrial automation.